An Energy Saving Tag Cache Model
نویسنده
چکیده
Energy consumption in caches is widely studied topic. The access to a cache line consumes energy. This paper proposes exclusive cache model that reduces the energy consumption over the tag cache model. The proposed model assumes two level exclusive cache with tag cache in level one. The tag cache consists of tag information of all cache levels. It is stored in cache in level one. An address is checked in tag cache and the corresponding line is accessed. On miss, the line is placed as in exclusive cache case updating the tag cache. The proposed model compares subsets of tag during address mapping. This turns on selectively the comparison circuitry in tag cache selectively saving energy consumption. A mathematical model is developed for the proposed model The proposed model is simulated with SPEC2000 benchmarks. The average memory access time is comparable with tag cache with energy saving of 7%. General Terms Cache memory
منابع مشابه
A Tag Cache Architecture for Two-Type Data Cache Model
For the two level two type data cache model proposed in literature, the two cache levels are accessed for each reference to determine the cache is to be inclusive or exclusive. This is achieved by probing the index array of the cache levels. This paper proposes tag cache architecture for the two type data cache model. The tag array at level one is accessed to determine if a line is present in l...
متن کاملAn Energy Efficient Set Associative Cache Algorithm
Set associative caches have fixed ways. Entire cache is enabled during cache operation. This paper proposes cache architecture mapping cache line to fixed cache way of mapped set. The address is mapped to set as in conventional set associative cache. The tag value of the mapped line is divided into blocks of size of number of cache ways. The average of maximum and minimum frequency of this divi...
متن کاملThe Core Degree Based Tag Reduction on Chip Multiprocessor to Balance Energy Saving and Performance Overhead
Tag reduction is an approach to save energy of the cache system in a processor. Our previous work described that it can save more energy on a Chip Multiprocessor (CMP) than on a single-core processor. In this paper, we further investigate the problem on balancing energy saving and performance overhead when tag reduction is used for the low power Chip Multiprocessor (CMP). We first introduce the...
متن کاملSentry Tag: An Efficient Filter Scheme for Low Power Cache
In this paper, we focus on low power design at the architecture level and propose a new architecture, called sentry tag, for reducing the on-chip cache power consumption in processors. The many unnecessary activities in the conventional cache-access process motivate our proposal. By pre-comparing the sentry bit of the access address with the sentry tag before starting a normal cache access, we ...
متن کاملAn Energy Saving Set Associative Cache Algorithm with Improved Performance
Enabling one way in set associative cache during operation is proposed in literature. However, this architecture degrades the average memory access time. This paper proposes an algorithm to map to certain way in set associative cache improving the performance. The address is mapped to certain way by certain transformations involving XOR'ing and shifting and bit selection. The line is accessed o...
متن کامل